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|Quartz Crystal Application Notes|
|Definition of Terms|
|Nominal frequency: The specified center frequency of the crystal. Unit of frequency is Hertz (Hz). Quartz crystals are specified in kHz or MHz.|
Crystal equivalent circuit: The crystal equivalent circuit of the quartz crystal consists of a motional capacitance Cl, the motional inductance L1, a series resistance R1, and a shunt capacitance C0. The first three parameters are known as the "motional parameters". See figure 1.
|Operating mode: The quartz crystal could operate at its Fundamental mode or harmonic modes. The fundamental mode is always the preferred oscillating mode. Odd harmonics such as 3rd, 5th, 7th, etc. are overtone modes.|
Frequency tolerance: The maximum allowable frequency deviation from a specified nominal frequency at ambient room temperature (25°C + 3°C). Frequency tolerance is expressed in percent (%) or parts per millions (ppm).
Frequency stability: The maximum allowable frequency deviation from the ambient temperature over the temperature range. Frequency stability is expressed in percent (%) or parts per millions (ppm). The frequency stability is determined by cut type, angle cut, angle cut tolerance, mode of operation, package styles, and mechanical dimensions of the quartz blank.
Series vs. Parallel resonance: When a crystal is operating at series resonance (Fs), it looks resistive in the circuit. At this point \XL\ = \XC\. In series resonance, load capacitance does not have to be specified. The antiresonant frequency (Fa) occurs when the reactance in the series branch is equal to CO.
|Equivalent Series Resistance (ESR): The value of impedance the crystal exhibits in the operating resonant circuit.|
Aging: The relative frequency change over a certain period of time and is typically expressed as a maximum value in parts per million per year (ppm/year). Typically, aging is computed within the first 30 days to 90 days and predicted exponentially over a longer period usually a year.
Operating temperature: The minimum and maximum temperatures within which crystal unit operates under specified conditions.
Storage temperature: The minimum and maximum temperatures that the crystal unit can be safely stored. Drive level: A function of the driving or excitation current flowing through the crystal. The drive level is the amount of power dissipated in the crystal and is expressed in milliwatts or microwatts. Drive level should be kept at a safe minimum condition to assure proper start-up. Excessive drive level will result in possible long-term frequency drift or crystal fracture.
Figure 4 shows the relationship between drive level and circuit load capacitance and optimum value guarantee for start-up condition.
|Load capacitance: Load capacitance (CL) is the amount of capacitance that the oscillator exhibits when looking into the circuit through the two crystal terminals. Load capacitance needs to be specified when the crystal is used in a parallel mode. Load capacitance is calculated as follows:|
|Spurious responses: Unwanted resonance usually above the operating mode, specified in dB max. or number of times of main mode ESR value. Frequency range is specified within couple of hundreds kilohertz.|
|Quartz Crystal Glossary of Terms|
|Crystal cuts: A blank wafer is obtained by cutting the quartz bar at specific angles to the various axes. The choice of axis and angle cut determines the physical and electrical parameters of the resonator. Figure 7 shows combinations of X, Y, and Z rotational cuts which are labeled in industry as AT, BT, CT, DT cut, etc. The most two common cuts in Abracon crystals are AT and BT-cuts. There are differences in temperature coefficients of the two cuts.|
|Vibration modes: The crystal vibrates and produces a steady signal when it is excited with a voltage. The mode of vibration depends on crystal cuts such as thickness shear for AT and BT cuts, length-width flexure for tuning fork, Face shear for CT, DT cuts, etc. Figure 8 shows a thickness-shear mode.|
|Shunt capacitance CO: The static capacitance between the electrodes (Ce) together with holder capacitance (Ch).|
|Co = Ce+Ch|
|Ch varies between 0.6pF to 0.8pF depending on mounting method.|
Motional capacitance C1: The capacitance of the nominal arm of the equivalent circuit. C1 results from the elasticity of the quartz blank.
|C1 (pF) = 0.22 x A (m") x F (Hz) / 1670|
|Where A = area of electrode in m2|
Quality factor Q: The factor that represents the sharpness of the resonant curve. Quartz crystal has a very high Q compared to other resonators typically in 10,000 to 100,000s.
|Pullability: When a crystal is operating at parallel resonance, it looks inductive in the circuit. As the reactance changes, the frequency changes correspondingly, thus change the pullability of the crystal. The difference in frequency between the Fs and Fa depends on the CO/CI ratio of the crystal unit and the load capacitance CL.|
Delta F from series resonant to parallel resonant in ppm:
|Pullability can be expressed in terms of load sensitivity (TS) in ppm/pF.|
|Negative resistance (-R): Negative resistance is used to evaluate circuit oscillation allowance. Lack of negative resistance could lead to initial circuit start-up and and unstable oscillation
at steady state.|
|Frequency vs. temperature characteristics: Figure 10 shows the frequency - temperature characteristics for a thicknessshear AT cut crystal. The AT-cut curve has an S-shape symmetrical to room temperature. Quartz crystals manufacturing process: Quartz crystals are manufactured in a clean environment to assure high-precision.|
|Highlights of the major steps in manufacturing process of the AT-Cut crystal are described below:|
As grown quartz bars - Lumbering - Cutting - Measurement of angle - Precision lapping - Beveling - Etching and Cleaning - Base coating - Mounting - Fine frequency adjusting -Annealing - Sealing - Aging - Final tests and Inspections.
Crystal mounting methods: Quartz blank unit is mounted on holder mounts with conductive epoxy or solder (tuning fork). Precise amount of silver epoxy is applied with automounter equipment.
|The following considerations must be well studied in order to
select the right crystal for your applications:
Tuning Tank LC Overtone Circuit.
|Questions & Answers|
|Q: Why does my crystal works sometimes, but not others?|
A: This is the most common complaint heard from crystal users. Unless the crystal supplier knows this common mode of failure, and applies preventive measures, this common problem can be solved earlier in design stage. Some customers describe these crystals as "sleeping crystals". The circuit start-up sometimes and does not at other times, unless been touched with a scope probe or fingers. Abracon predicts this problem in our Design and
Process Failure Mode Effect Analysis (DFMEAand PFMEA) with two main root causes:
A: Abracon offers quick-turn programmable oscillators in four different package styles; the ceramic package 7.0x5.0x1.6 mm, plastic molded package similar to Epson SG-8002, and the 14 pin and 8 pin dip packages. The single PLL architecture with EPROM programmable generates a custom frequency derived from an internal crystal between lOMHz to 25MHz. The main advantages of the programmable oscillators are:
Q: What is PLL technology?
A: A PLL allows a frequency to be generated from any other frequency, where:
A: Jitter is the uncertainty or short-term variations of a digital waveform timing from their ideal positions in time.
A: We use LeCroy digitizing oscilloscope with jitter timing software for jitter measurement and analysis. The scope must have the bandwidth at least five times the frequency of the waveform since the waveform jitter is measured as each rising cycle crosses the threshold voltage. The larger number of continuous cycles the more accurate is the jitter distribution. Jitter is measured in cycle-to-cycle (or absolute jitter) or one sigma jitter (rms.) using the histogram analysis. Unit of jitter is ps.
A: Yes. Crystal oscillators can be designed to minimize their phase noise characteristics. Special applications such as wireless require best phase noise both at far-end and close-end. Crystal parameters and mounting methods directly affect close-end phase noise 300Hz offset from carrier. The oscillator front-end and output buffer primarily control phase noise with offset frequency from carrier greater or equal to 1kHz.
A: The crystal oscillator is typically used as a master clock for the microprocessor and its parameters are not affected by the internal characteristics of the microprocessor such as variation in load capacitance and other variables that could affect the change in frequency at room and over temperature. The over all frequency stability in crystal oscillators is typically +100ppm max. and includes frequency calibration at 25°C, over temperature, frequency changes due to load, supply, aging, vibration, and shock.
Q: What is the start-up time?
A: Start-up time is the delay time between the oscillation starts from noise until it reaches its full output amplitude when power is applied. The supply voltage must be applied with a defined rate or rise. The start-up time varies from microseconds to milliseconds depending on frequency, ASIC speed and logic. Please see figure 1.
A: When the voltage at the control pin is set to a logic low "0",the out put is in Tri-state mode that is High Impedance. The disabled current is usually lower than its normal operating current but not completely cut-off as it was seen in the Stand-by mode, where the oscillation is shut down completely.There is an internal pull-up resistor between control pin and supply (typically 1ook Ohms), therefore the control pin can be left open (floating) if unused.
Q: What is jitter and how to specify its maximum value?
A: Jitter is noise caused by many sources in crystal oscillators. Major sources of noise are:
CYCLE TO CYCLE JITTER
The Cycle to cycle jitter is the maximum difference in time between several measured periods. Usually a minimum of ten (10) cycles is used where T1 to T10 were recorded . See fig. 2.
The period jitter is the maximum change of a clock edge. It is usually expressed as peak-to-peak jitter and can be converted to rms value by multiplying to (0.5) x (0.707). The period jitter can only be measured at each cycle but not multiple cycles. See figure 3.
A: Phase noise is the expression of noise in the frequency domain. It is a measure of the short-term frequency fluctuations of the oscillator. It is usually specified as the single sideband power density in a 1 Hz bandwidth at a specified offset frequency from the carrier.
CMOS RISE AND FALL TIMES
The rise and fall time on the CMOS technology depends on its speed (CMOS, HCMOS, ACMOS, BICMOS), the supply voltage, the load capacitance, and the load configuration. Typical rise and fall time for CMOS 4000 series is 30ns, HCMOS is 6ns, and for ACMOS (HCMOS, TTL compatible) is 3 ns max.
Typical rise and fall time is measured between 10% to 90% of its waveform level.
Due to the fast transition time of the ACMOS (HCMOS/TTL compatible) device, proper termination techniques must be used when testing or measuring electrical performance characteristics.
There are three general methods of terminating a clock trace, which is a process of matching the output impedance of the device with the line impedance:
Series termination (Fig. 3)
Pull-Up / Pull-Down Resistors (Fig. 4)
Parallel AC Termination (Fig. 5)